set width 0
set height 0
set rdiheartbeat off
set rdiromatzero on

# macro to "reset" the processor to a known state
# mostly just shut of the timers and disable all 
# of the interrupts 

define resetcpu
  # map internal SRAM to 3fe0000
  # map special regs to  3ff0000
  # cache disabled
  set *0x7ff0000 = 0x83ffffa0
  
  # shut off timers
  set *0x7ff6000  = 0
  
  # set all port pins to input (disabling WD timer)
  set *0x7ff5000  = 0
  
  # disable WD in dallas part
  set *(char*)0x760800f &= 0xfc
  
  # shut off Ethernet MAC and BDMA
  set *0x7ffa000 = 0
  set *0x7ffa004 = 0
  set *0x7ffa008 = 0
  set *0x7ffa010 = 0

  set *0x7ff9000 = 0
  set *0x7ff9004 = 0
  set *0x7ff9008 = 0
  set *0x7ff900c = 0
  
  # reset UARTS
  set *0x7ffc000 = 0
  set *0x7ffc004 = 0
  set *0x7ffd000 = 0
  set *0x7ffd004 = 0

  # disable/clear interrupts
  set *0x7ff4000 = 0
  set *0x7ff4008 = 0xffffffff
  set *0x7ff4004 = 0xffffffff
end

# macro to load memory config program into SRAM and run it

define memconfig      
  delete
  symbol-file memconfig
  load memconfig
  tbreak __memoryConfigDone
  cont
  symbol-file
end

define reload-with-break
  resetcpu
  delete
  symbol-file 
  symbol-file $arg0
  load $arg0
  break *0x00
  break *0x04
  break *0x08
  break *0x0c
  break *0x10
  break *0x14
  break *0x18
  break *0x1c
  display   *(char*)0x760800f &= 0xfc
end  

define reload
  resetcpu
  delete
  symbol-file 
  symbol-file $arg0
  load $arg0
  display   *(char*)0x760800f &= 0xfc
end  

# the "display *(char*)0x760800f &= 0xfc" will disable the
# watchdog timer in the Dallas Semi part whenever execution
# stops (when breakpoint is hit or when the user stops the
# program.)  If we don't do this, the board will reset after
# a breakpoint has been hit.

set dis std

set endian big
# target rdi /dev/ttyS0 19200
# target rdi s=/dev/ttyS0,p=/dev/par0 19200
target rdi e=jeeni

resetcpu

